Profile

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Jinjia Zhou （周 金佳／しゅう きんか） received B.E. degree from Shanghai Jiao Tong University, China, in 2007. She received M.E. and Ph.D. degrees from Waseda University, Japan, in 2010 and 2013, respectively. From 2013 to 2016, she worked as a junior researcher at Waseda University, Fukuoka, Japan. Following that, she served as an Associate Professor and co-director of the English-based graduate program at Hosei University from 2016 to 2020. Additionally, from 2017 to 2021, she held the position of senior visiting scholar at the State Key Laboratory of ASIC & System, Fudan University, China. From 2020 to 2021, she was also appointed as a specially appointed Associate Professor at Osaka University. Currently, she is an Associate Professor at Hosei University. Her research interests focus on algorithms and VLSI architectures for multimedia signal processing.

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Dr. Zhou was selected as JST PRESTO researcher during 2017-2021. She received a research fellowship of the Japan Society for the Promotion of Science during 2010-2013. Dr. Zhou is a recipient of the Chinese Government Award for Outstanding Students Abroad of 2012. She received the Hibikino Best Thesis Award in 2011. She was a co-recipient of ISSCC 2016 Takuo Sugano Award for Outstanding Far-East Paper, the best student paper award of VLSI Circuits Symposium 2010, and the design contest award of ACM ISLPED 2010. She participated in the design of the world-first 8K UHDTV video decoder chip, which was granted the 2012 Semiconductor of the Year Award of Japan.

She works as an associate editor for IEEE Access and Computers & Electrical Engineering, an editorial board member for Cognitive Robotics, and as a reviewer for journals including IEEE Trans. Circuits Syst. Video Tech., IEEE Trans. Circuits Syst. I, IEEE Trans. VLSI Syst., and IEEE Trans. Multimedia.